Integrated circuits composed of insulated-gate-field-effect-transistor (IGFET) devices often employ a dynamic mode of operation in order to save power whereby a node or conductor is precharged to a predetermined voltage during a first time period. During a second subsequent time period, the precharge circuitry is isolated from the precharged node and other circuitry is coupled to the precharged node for selectively discharging the precharged voltage stored thereon. The frequency of operation of the circuitry in this dynamic mode is such that the precharged voltage stored on the node does not have sufficient time to leak off or discharge prior to the next cycle if the circuitry coupled to the precharged node during the second time period does not provide a discharge path. This dynamic mode of operation eliminates D.C. static paths between the power supply conductor (V.sub.DD) and ground potential, thereby saving power. A read-only-memory (ROM) circuit which employs such a dynamic mode of operation is described in U.S. Pat. No. 4,021,781, invented by Caudel and issued May 3, 1977. In the ROM circuit disclosed by this reference, a plurality of column conductors are precharged, after which time one of the column conductors is selected in response to an input address in order to supply an output signal. As a given circuit may contain a plurality of columns for each output bit, and since the circuitry may simultaneously provide a plurality of output bits in order to make up an output word, the power dissipation which results from precharging each of the column conductors for each output bit may be considerable. Precharging a great number of column conductors simultaneously results in the creation of a relatively large current transient which might possibly disturb the operation of other circuitry on the same integrated circuit chip. Those skilled in the art should appreciate that circuitry which performs the precharge function while significantly reducing the power dissipation associated with the precharging function is a significant improvement over the prior art.
As mentioned above, the output signal generated by this dynamic mode of operation is either the voltage initially precharged on the column conductor or a lesser voltage which results from selectively discharging the precharged column conductor. Thus, the speed with which the output signal can be sensed relates to the time required to discharge the column conductor. If the voltage difference between the initially precharged level and the discharged voltage level is relatively large, then the time required to discharge the column conductor will be significant. However, if the voltage difference between the precharged level and the discharged level is relatively small, then errors are likely to result when attempting to sense which logic level is represented by the voltage on the column conductor. Those skilled in the art should appreciate that precharge circuitry which combines the advantages of rapid discharge time with the advantages of easily distinguishable logic "1" and logic "0" voltage levels is a significant improvement over the prior art.